Intel *45 *35 chipset - txt attack

2009-12-25 / 2009-12-26
Risk: High
Local: Yes
Remote: No
CWE: CWE-16


Ogólna skala CVSS: 7.2/10
Znaczenie: 10/10
Łatwość wykorzystania: 3.9/10
Wymagany dostęp: Lokalny
Złożoność ataku: Niska
Autoryzacja: Nie wymagana
Wpływ na poufność: Pełny
Wpływ na integralność: Pełny
Wpływ na dostępność: Pełny

Another TXT Attack Earlier this year our team has presented an attack against Intel TXT that exploited a design problem with SMM mode being over privileged on PC platforms and able to interfere with the SENTER instruction. The Intel response was two-fold: to patch the SMM implementation bugs we used for the attack (this patch was for both the NVACPI SMM attacks, as well as for the SMM caching attack), and also to start (intensify?) working on STM specification, that is, we heard, planned to be published sometime in the near future. STM is a thin hypervisor concept that is supposed to provide protection against (potentially) malicious SMMs. Today we present a totally different attack that allows an attacker to trick the SENTER instruction into misconfiguring the VT-d engine, so that it doesn’t protect the newly loaded hypervisor or kernel. This attack exploits an implementation flaw in a SINIT AC module. This new attack also allows for full TXT circumvention, using a software-only attack. This attack doesn't require any SMM bugs to succeed and is totally independent from the previous one.

Referencje:

http://xforce.iss.net/xforce/xfdb/54963
http://www.vupen.com/english/advisories/2009/3618
http://www.securitytracker.com/id?1023382
http://www.securityfocus.com/bid/37430
http://theinvisiblethings.blogspot.com/2009/12/another-txt-attack.html
http://security-center.intel.com/advisory.aspx?intelid=INTEL-SA-00021&languageid=en-fr
http://secunia.com/advisories/37900
http://osvdb.org/61248
http://invisiblethingslab.com/resources/misc09/Another%20TXT%20Attack.pdf


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